As a tinkerer: 1. I can read the official specs without agreeing to an onerous license. 2. There are several open source implementations I can choose to run o

As a tinkerer: 1. I can read the official specs without agreeing to an onerous license. 2. There are several open source implementations I can choose to run on an FPGA. 3. I can choose the simplest combination of features. Want a multiply instruction, but no branch prediction? Want caching but no MMU requiring multi-level address virtualization? A large processor vendor has to employ a small army of processor designers. The trend will always be in the direction of adding more features and increasing complexity. Customers will write code to require those features, and the cycle continues. Only very rarely a fresh design will appear having the right combination of attributes to give it a chance of being a viable platform for a long time. This is what makes Risk-V attractive to me.