As a student, I found the bottom-up approach quite interesting in a lab format. (Though it was an FPGA lab - learning about CPU architecture was a side benefit.

As a student, I found the bottom-up approach quite interesting in a lab format. (Though it was an FPGA lab - learning about CPU architecture was a side benefit. And it was at M.Sc. level, so we were somewhat familiar with the basics.) We built some fundamental blocks in VHDL (e.g. buffers, mux, adder, memory, decoder, ALU), combined them into a basic CPU with fetch/decode/execute stages, added a load/store unit and control flow instructions to make it turing complete, then added optimizations like pipelining. We wrote some code to run on it. Then we switched to a LEON3 off the shelve softcore and implemented our own AMBA peripherals to interface with some real sensors/actors. The ability to view the NAND gates your code synthesizes was great. Tracking signal propagation delays motivated certain basic design decisions very well. Writing code that runs on a CPU that you also wrote is so incredibly rewarding. (And it's interesting when a bug can be either in your program or your CPU.) And finally integrating a real-world softcore really showed how practical this can actually be even outside of Intel / AMD.