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But once they do get on the chiplet train properly, their EMIB technology means they only need a small 'bridge' piece of silicon to connect their chiplets. In c
by kingosticks 7y ago
But once they do get on the chiplet train properly, their EMIB technology means they only need a small 'bridge' piece of silicon to connect their chiplets. In contrast to what TSMC offer where all the chiplets need to sit within a large silicon interposer. This is more expensive and it limits the size of the chip you can produce (as there is a limit to the interposer size). They also announced that Foveros stacking thing and now co-EMIB too; on paper Intel's new packaging tech looks like it could really help them. They just need to make use of it.
- wmf 7y agoSome chiplets don't need an interposer or EMIB (we used to call this MCM back in the day but whatever).
- kingosticks 7y agoWhen one of the chiplets is responsible for IO and the others all need to talk to it, like AMD are doing, they do. I guess you could go down through the package and back up again like the olden days if you wanted a much worse solution.
- wmf 7y agoPlease look at an AMD processor before digging yourself deeper.
- deleted 7y ago[deleted]