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Blog post from Nvidia: http://blogs.nvidia.com/2011/01/project-denver-processor-to-usher-in-new-era-of-computing/ http://blogs.nvidia.com/2011/01/project-denver
by zhyder 16y ago
Blog post from Nvidia: http://blogs.nvidia.com/2011/01/project-denver-processor-to-usher-in-new-era-of-computing/ http://blogs.nvidia.com/2011/01/project-denver-processor-to-...
- wmf 16y agoWow, Bill Dally is still having the RISC vs. CISC discussion. That's daring; most computer architects consider it a settled issue.
- miloshasan 16y agoThe article does not contain the word "CISC"...
- wmf 16y ago"variable-length instructions, ... a larger area for instruction decoding" == CISC
- miloshasan 16y agoAh, OK... I thought he was comparing more "CPU-like" to "GPU-like" designs, rather than CISC to RISC.
- wtallis 16y agoWhich way do you think the issue was settled? Last time I read much about the issue, there seemed to be decent arguments both ways: CISC allows denser packing of instructions, but all CPUs are RISC internally, but the CISC decoders are negligible overhead, but good compilers are easier to write for RISC, ... How valid are the various arguments these days? The compiler complexity argument seems to work well against the Itanium, but I'm not sure that it makes much difference between ARM and x86 or x86_64. The instruction decoders on an x86 processor really do look minor on paper, but why hasn't Intel been able to produce a chip with competitive performance per watt, especially given their fab advantage? It seemed like they were really trying with the Atom, but it still hasn't gotten down to the power levels where ARM really shines, even though the high-end ARM cores are now out-of-order superscalar designs.
- wmf 16y agoThe consensus is that RISC vs. CISC doesn't matter because microarchitecture trumps ISA: the cost of instruction decoding is now small, I-caches negate any difference in code density, compilers can produce efficient code for any reasonable (i.e. non-Itanium) architecture, etc. I am honestly surprised to see Dally's complaints.
- anonymous246 16y agoDo you have any insights into why then x86 chips consume so much power than the ARM equivalents? Btw, I tend to agree with you,and think Intel's engineers are just being lazy wrt power. I expect this Nvidia chip to get crushed technically when Intel's engineers gear up and really work on power (like they did when Transmeta's Crusoe came out).
- wtallis 16y agoThere's probably quite a bit of truth to that, but in recent years Intel has had two dramatic under-performers (Atom can't come close to ARM and the on-chip graphics for their mid-range processors have yet to fill the gap left when Intel forced NVidia to stop making integrated graphics chipsets) and a complete failure (Larrabee) that seem like they shouldn't have happened given Intel's dominance. Why is Intel having trouble broadening their horizons? Is it an institutional thing, that the teams not working on the main (and most profitable) CPU product lines just can't get the resources needed to catch up with the competition? Intel always has the latest and greatest fabs, but it seems like the designs they're producing for these new product lines are completely squandering that advantage and then some.
- miloshasan 16y agoI suspect that the inability to bring down power isn't just "laziness" on Intel's part. Decreasing power consumption is (more or less) equivalent to increasing performance per watt - an area where Nvidia and ARM designs may simply be better.
- effn 16y agoMany arm chips support both a RISC ISA (the original ARM), and a more CISC-y ISA (thumb2). They consume less power and perform better with the latter. So well, in fact, that some chips don't even bother with the legacy RISC mode.