3 ms·
I'll link to the wikipedia graphic of Moore's Law: https://upload.wikimedia.org/wikipedia/commons/8/8b/Moore%27s_Law_Transistor_Count_1971-2018.png https://uplo
by kurthr 7y ago
I'll link to the wikipedia graphic of Moore's Law:
https://upload.wikimedia.org/wikipedia/commons/8/8b/Moore%27s_Law_Transistor_Count_1971-2018.png https://upload.wikimedia.org/wikipedia/commons/8/8b/Moore%27...
It makes the point that Moore's law is dead. You can see the slope change in in 2006 with the Dual Core Itanium2. So it died after Dennard scaling toppled (and some of the fastest growth ever), and although transistor count continues to increase it is noticeably slower... I fear that it may go slower still since economic costs continue to increase, but profits don't (as fast). When the CFO figures out it's not worth investing in scaling, you just won't build new fabs (unless the gov just says so).
To put some numbers to this (topline growth):
1971 TMS1000 (8k) to 1979 M68000 (70k) 2.6yr/double
1979 M68000 (70k) to 2003 Itanium M6 (400M) 1.9yr/double
2003 Itanium2 6M (400M) to 2006 Dual Itanium (1.6B) 1.5yr/double
2006 Dual Itanium2 (1.6B) to 2018 GC2 IPU (24B) 3.1yr/double
Personally, I think that an era of backend improvements (wafer stacking etc) to combine processes (Memory/Logic/Flash) into locally interconnected 2.5D is possible, if there remains sufficient investment, and that in turn could drive some improvements to performance and pricing. However, that relies on ever more complex system design and integration... and heat dissipation issues. I don't see full 3D scaling or Quantum compute on the 3-5 year horizon where big new investments will be required.
(edit formatting commentary and qualification)
- jsjohnst 7y agoI’m not sure I agree with your point about the Itanium2 specifically on this graph. It looks like the Itanium2 is an anomaly on the high side of the hockey stick to me, rather than being the rule.
- kurthr 7y agoSince this chart doesn't show transistors/mm2 you kinda have to use the peaks and assume they are close to reticle/density limite. You could look at the lower ones or the "average", but it's not indicative of what is possible. In fact both die size and reticle size have been growing, which makes the plots pre-300mm wafer over performing... little of that happened in the last 15 years which has not helped continue the trend, and that's over since GPUs have been at max reticle for years now. I'm guessing that die size increase was originally about cooling. (edits corrected grammar and double negative added cooling comment)
- Veedrac 7y agoThat looks like a pretty straight line to me, TBH. You're doing more subdivision than is fair to the data. I did my own graph of just density, which is also pretty clearly straight. https://docs.google.com/spreadsheets/d/1NNOqbJfcISFyMd0EsSrhppW7PT6GCfnrVGhxhLA5PVw/edit#gid=1105655921 https://docs.google.com/spreadsheets/d/1NNOqbJfcISFyMd0EsSrh...
- kurthr 7y agoYours is noticeably straighter than the Wikipedia page. I see that you are plotting density and not #transistors? Is that what Moores law says? Or does die size count? If you plot total #transistors your fitted slope will plummet in the later years and you'll see the change post 2006.
- Veedrac 7y agoI think what Moore's law is depends on who you ask. Density makes sense and seems to be holding true, but so does cost/transistor, which hasn't.
- perl4ever 7y agoThe Wikipedia chart looks pretty straight to me. What I think you are calling "a change in slope" looks to me more like a period in which there were a bunch of outliers, and those outliers formed a kind of hump.
- tomxor 7y ago> and although transistor count continues to increase it is noticeably slower. Yes, I would be surprised if the rate manages to be even linear - it can never be exponential as it was with process shrinkage because now the opposite is happening - we are increasing the total die size, but without changing the frequency. The first problem of this method is dealing with increased propagation delay between distant blocks, requiring different architecture and scheduling (assuming we just accept parallel computing as the only way forward). Then there is the much harder problem to sustainably solve: power consumption and heat dissipation, requirements that grow in proportion to the transistor count. ... all of these issues were naturally avoided with process shrinkage, propagation delay reduced in proportion, and the power density per unit area remained roughly the same, and so up to the physical limits of the material it was a truly sustainable window of exponential growth.