Zen in many ways is still moving towards that model, The concept of an IO die that all cores hook into, along with all of PCI-E lanes, no need for complicated c

Zen in many ways is still moving towards that model, The concept of an IO die that all cores hook into, along with all of PCI-E lanes, no need for complicated cross core linking. It would be relatively "easy" to introduce specialized accelerator cores or beefy GPU chips into this mix on a separate chip, and not massively complicate the CPU design, or massively bloat its cost as a specialist die.