A factor of 5. A typical improvements for microarchitecture is a factor of 2, spread between different units. For example, we could speed up full word adder (m

A factor of 5. A typical improvements for microarchitecture is a factor of 2, spread between different units. For example, we could speed up full word adder (most common roadblock for higher clock frequency in current CPU's) by 10 percents, add scoreboard that allow us to issue 1.3 instructions in average load, add bypass logic that allows us to cut delay by 1/5 (5 cycles for pipeline) and we get 1.11.31.2=1.72 of our previous speed. I assume that ARM already have all those fancy bypasses and scoreboards. So how would they get that 5 times speed up? I think it will be true for some special cases, like Javascript interpreter or video decoding. I bet on JS. It is hard to speed up a mature architecture by five times.