Sometimes when designing for an FPGA/ASIC, the easiest way to implement some sort of complex control logic is to use a small CPU. For example, the Nvidia Tegra

Sometimes when designing for an FPGA/ASIC, the easiest way to implement some sort of complex control logic is to use a small CPU. For example, the Nvidia Tegra X1 SoC contains a handful of Falcon CPUs (proprietary ISA and core), responsible for amongst others: - USB 3.0 command/event processing - Video Image Compositor 'inverse telecine' processing - HDMI security Same goes for your nVidia PC GPUs - they have Falcons sprinkled across the entire thing.