I think that is the point. If people are willing to program in this paradigm (message passing), then 1000+ core chips are possible. I think the question become

I think that is the point. If people are willing to program in this paradigm (message passing), then 1000+ core chips are possible. I think the question becomes: For problems decomposed into a message passing solution, is a 15x speedup for on die message passing a win at the 1000 core scale? Or another way around, for the scale problems that work at 1000 cores, is the message passing overhead is negligible and you can just as well stick them on separate dies/modules/blades/racks.