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Surprised with FPGAs that there isn't a wave of new assembly languages. Or that processors in memory haven't taken off. Parallel prefix, vector addition, vecto

by crb002 7y ago

Surprised with FPGAs that there isn't a wave of new assembly languages. Or that processors in memory haven't taken off. Parallel prefix, vector addition, vector transpose, 32x32 dense matrix multiply ...

jlokier 7y ago
The basic reason is price, which appears to be down to commercial decisions, rather than manufacturing cost. FPGAs which are large and fast enough to make interesting CPUs are readily available, but they are far too expensive, compared with buying an equivalent CPU core. For perspective, the FPGAs you can rent on Amazon are listed at around USD $20,000 per individual FPGA chip! Much cheaper and smaller FPGAs exist, but they aren't generally cost-effective and performance-compatitive against an equivalent design using a CPU, even with the advantages provided by custom assembly languages and hardware extensions. There are times when it's worth it. People do implement custom assembly languages on FPGAs quite often, for custom applications that benefit from it. I've done it, people I work with have done it, but each time in quite specialised applications. (CPU manufacturers use arrays of FPGAs to simulate their CPU designs too.) Processors in memory is another thing entirely. These are actively being worked on. GPUs using HBM exist, where the HBM RAM is a stack of silicon dies laid directly on top of the GPU die, with large numbers of vertical interconnections. These behave similarly to processors-in-memory, because there are a lot of processing units (in a GPU), and a lot of bandwith to reach the memory from all of the units. Some studies show diminishing returns from increasing the memory bandwidth further, with the present GPU cores and techniques, so it's not entirely clear that intermingling the CPU cores with the RAM cores on the same die would bring much improvement. There is a physical cost to mingling CPU and bulk RAM on the same die, which is that optimal silicon elements are different for CPUs than for bulk RAM, so manufacturing would be either more expensive, or make compromise elements.
- floatboth 7y ago
  > HBM RAM is a stack of silicon dies laid directly on top of the GPU die nitpick: actually they're off to the side, connected via the interposer: https://images.idgesg.net/images/article/2019/02/amd-vega-radeon-vii-hbm-100787435-large.jpg https://images.idgesg.net/images/article/2019/02/amd-vega-ra...
  - jlokier 7y ago
    Thanks!
- crb002 7y ago
  About 1 ns per foot latency at speed of light. Having the CPU only six inches from the RAM is 1 ns round trip latency. Only way to lower that cost is physically moving the CPU closer.

by crb002 7y ago

jlokier 7y ago

The basic reason is price, which appears to be down to commercial decisions, rather than manufacturing cost. FPGAs which are large and fast enough to make interesting CPUs are readily available, but they are far too expensive, compared with buying an equivalent CPU core. For perspective, the FPGAs you can rent on Amazon are listed at around USD $20,000 per individual FPGA chip! Much cheaper and smaller FPGAs exist, but they aren't generally cost-effective and performance-compatitive against an equivalent design using a CPU, even with the advantages provided by custom assembly languages and hardware extensions. There are times when it's worth it. People do implement custom assembly languages on FPGAs quite often, for custom applications that benefit from it. I've done it, people I work with have done it, but each time in quite specialised applications. (CPU manufacturers use arrays of FPGAs to simulate their CPU designs too.) Processors in memory is another thing entirely. These are actively being worked on. GPUs using HBM exist, where the HBM RAM is a stack of silicon dies laid directly on top of the GPU die, with large numbers of vertical interconnections. These behave similarly to processors-in-memory, because there are a lot of processing units (in a GPU), and a lot of bandwith to reach the memory from all of the units. Some studies show diminishing returns from increasing the memory bandwidth further, with the present GPU cores and techniques, so it's not entirely clear that intermingling the CPU cores with the RAM cores on the same die would bring much improvement. There is a physical cost to mingling CPU and bulk RAM on the same die, which is that optimal silicon elements are different for CPUs than for bulk RAM, so manufacturing would be either more expensive, or make compromise elements.

floatboth 7y ago
> HBM RAM is a stack of silicon dies laid directly on top of the GPU die nitpick: actually they're off to the side, connected via the interposer: https://images.idgesg.net/images/article/2019/02/amd-vega-radeon-vii-hbm-100787435-large.jpg https://images.idgesg.net/images/article/2019/02/amd-vega-ra...
- jlokier 7y ago
  Thanks!
crb002 7y ago
About 1 ns per foot latency at speed of light. Having the CPU only six inches from the RAM is 1 ns round trip latency. Only way to lower that cost is physically moving the CPU closer.