12 ms·
Thats not the point of the article. I doesn't say that RISC-V doesn't support SIMD, it argue that in the real world, we prefer big instruction like SIMD that do
by maeln 7y ago
Thats not the point of the article. I doesn't say that RISC-V doesn't support SIMD, it argue that in the real world, we prefer big instruction like SIMD that do a lot of thing "at once", which is not what RISC-V as been designed for even though it support some.
- jasonhansel 7y agoI think SIMD is actually quite compatible with the RISC philosophy, since SIMD is just a straightforward extension of normal arithmetic primitives.
- nickik 7y agoRISC-V from the beginning was designed to work perfectly fine with vector processing. The lab that developed RISC-V made RISC-V to have an architecture that would allow them to use different vector units and experiment with different vector architectures. The Berkley Parallel Comouting Lab is where the worked on RISC-V. The RISC-V V extention is the result of this work and exploration into parallel architecture. RISC-V was to be modular and the V extention is just as much part of RISC-V as the F extention.
- maeln 7y agoI honestly don't have any opinion about it as i am not knowledgeable about this thing. I was just re-stating what the article is saying, and it didn't say that RISC-V doesn't have SIMD.