The basic idea is that the unconditional jump instructions can optionally write the address after the jump to a register, which allows reusing them as call inst

The basic idea is that the unconditional jump instructions can optionally write the address after the jump to a register, which allows reusing them as call instructions (it stores the return address in the register). Since calls don't manipulate the stack, return becomes equivalent to an indirect jump to the return address. Thus indirect call, indirect jump and return all become the same instruction. I think this is elegant, at least superficially. However this ambiguity makes tracking the callstack harder, which RISC-V solves by introducing the convention that the x1 register is used for the return address. Which means that the normally irrelevant choice of register suddenly has performance implications, which is not so elegant.