FPGA designs are usually created with high-level synthesis tools, where the input is not that much different from writing "software". See Chisel, and other such

FPGA designs are usually created with high-level synthesis tools, where the input is not that much different from writing "software". See Chisel, and other such languages. The designs for some RISC-V CPUs are available as open-source, so one could in theory take all that, and make it available as a library that you can compose as you wish. Slight downside is that now you have to be knowledgeable at FPGAs, Operating Systems and Programming Languages to build something coherent. If the components are well documented, simple and easy to use then perhaps the resulting system would be of less complexity than your typical system today. It would be interesting to see how one could go in one direction to create a minimal self-contained system with such an architecture, i.e. the VPRI STEPS projects, but including FPGAs this time. On the other hand there is tremendous value in using some well-defined standards along the way so you can benefit from all the debugging, analysis and verification tools that already exist, so such hardware/software co-design is always a balance.