27 ms·

For the same number of bits, posits are quite a bit more expensive to implement in terms of area than traditional floats.

• dnautics 7y ago
  That's not true, as I have implemented both, in FPGA. The INRA implementation missed key optimizations in the adder and multiplier.
  • TomVDB 7y ago
    The INRIA paper was indeed my reference. It seems like a huge mistake if they missed key optimizations, but I'm happy to take your word for it. Are there write-ups that go in detail about these mistakes? It's the kind of somebody-is-wrong-on-the-Internet topic that would result in flaming blog posts. :-)
    • jdsully 7y ago
      That paper used High Level Synthesis which would be the equivalent of coding something in ruby and comparing it with another algorithm written in optimized assembly.
    • dnautics 7y ago
      Not really. If you look at the inria pseudocode they check if the posit is negative or positive before doing addition, and convert, in the style of 754 one's complement encoding, but you shouldn't need to do that with posits since the encoding is two's complement. I mean, I helped design the posit spec and the twos complements treatment is something not even John Gustafson understands... The key insight is that the hidden bit is -2 for negative numbers (instead of 1 as it is for positive numbers). It's kind of nonobvious and I happened upon it by accident one night while fooling around with circuit diagrams. If people really get serious about it I'm sure though that it will get rediscovered by EDA folks smarter than I.