5 ms·
processor : 15 vendor_id : AuthenticAMD cpu family : 23 model : 113 model name : AMD Ryzen 7 3700X 8-Core Processor stepping : 0 microcode : 0x8701
by mikedilger 7y ago
processor : 15
vendor_id : AuthenticAMD
cpu family : 23
model : 113
model name : AMD Ryzen 7 3700X 8-Core Processor
stepping : 0
microcode : 0x8701013
cpu MHz : 1863.008
cache size : 512 KB
physical id : 0
siblings : 16
core id : 7
cpu cores : 8
apicid : 15
initial apicid : 15
fpu : yes
fpu_exception : yes
cpuid level : 16
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate sme ssbd mba sev ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif umip rdpid overflow_recov succor smca
bugs : sysret_ss_attrs spectre_v1 spectre_v2 spec_store_bypass
bogomips : 7189.14
TLB size : 3072 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 43 bits physical, 48 bits virtual
power management: ts ttp tm hwpstate cpb eff_freq_ro [13] [14]
- trebligdivad 7y agoThanks! Lots of flags....
- whereistimbo 7y agoOne advantage of AMD over Intel is AMD included SHA hardware acceleration on every Ryzen processor.
- ryacko 7y agoSHA hardware acceleration is more likely to be used in SSH and some deduplication set ups, as well as git. It isn’t that much of a plus.
- Avamander 7y agoA lot of software is compiled for very generic CPUs, I wouldn't be surprised if it's not used in many cases.
- blattimwind 7y agoThat's not how things are done. Practically every library that has optimized implementations for stuff selects the implementation at runtime based on CPUID.
- Avamander 7y agoExactly, assuming optimized implementations in libraries, that's not always the case and binaries compiled just exactly for the one CPU tend to perform better.
- Avamander 7y agoDon't know why the downvotes, do people think optimized implementations utilizing certain CPU features or combinations of them are somehow super common?
- blattimwind 7y agoPeople think that because it is correct. Any serious crypto library (libsodium, OpenSSL, crypto++, cryptlib, ...) that comes to mind uses this approach, codecs use it, your C standard library uses it etc.
- Avamander 7y agoBut there's many other libraries out there than just those though?
- blattimwind 7y ago"One advantage of AMD over Intel is AMD included SHA hardware acceleration on every Ryzen processor." What do you think is more common? People rolling their own SHA implementation or people calling <insert crypto library>'s SHA256()? The former will barely get any sort of optimization, regardless of compiler flags, the latter will automatically use the SHA extensions.
- ComputerGuru 7y agoI actually wrote up about this back in 2017 [0]; the general feeling in the community at the time was that it would be “right around the corner” from Intel, but that hasn’t really happened. [0]: https://neosmart.net/blog/2017/will-amds-ryzen-finally-bring-sha-extensions-to-intels-cpus/ https://neosmart.net/blog/2017/will-amds-ryzen-finally-bring...