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After all of the fuss about Intel's architecture issues, I'm really left wondering if AMD is just "totally killing it" and they simply have a superior product d
by nvahalik 7y ago
After all of the fuss about Intel's architecture issues, I'm really left wondering if AMD is just "totally killing it" and they simply have a superior product due to something like better processes, or if AMD will end up in the same bathwater with Intel at some point with a bunch of flaws exposed.
IOW: How is that AMD is now poised to eat Intel's lunch? Is it too good to be true?
- zamadatix 7y agoI'd say every modern CPU is going to have it's fair share of flaws exposed over time but even given Intel's prominence they have likely done worse than average. I say this because the flaws are rarely around a specific special feature of one CPU, they are common things all modern CPUs implement and for some reason Intel seems to have implemented them worse than almost anyone else from a security perspective. I think it's a triply unlucky time for Intel who has: - An aging CPU architecture - An aging node due to their in house 10nm being many years behind schedule. Squeezing blood from a rock with refinements at this point. - A bunch of security vulnerabilities that don't affect other CPUs Not to say AMD hasn't been doing a good job with improvement, design, and innovation it's just that Intel's failures have been driving the shrinking difference as well. It only takes one of these 3 to change for Intel to have a huge jump itself.
- sneakernets 7y agoIt's very hard to eat Intel's lunch when everyone tunes to Intel's notes. It'll take a while.
- rbanffy 7y agoAMD investing in Linux build systems to ensure that every library shipped on every Linux distro runs optimally on their processors would do a huge service to them. From time to time I check builds and performance on POWER. There is a Brazilian university that provisions POWER9 systems for free (for short times). I am not sure how actively IBM collaborates with glibc, gcc and clang crowd or how dedicated to make Linux workloads perform better on POWER than they do on similarly priced Xeon boxes. I also know Intel has some hard-to-find non-commercial licenses for their compiler and performance analyzers one can use to fine tune their code to Intel architectures (and make it terrible on anything else ;-)) which is perfectly fine if you know what CPUs your code is going to run on (as it frequently is with HPC).
- rbanffy 7y ago> or if AMD will end up in the same bathwater with Intel at some point with a bunch of flaws exposed. I would assume the answer to that over an unconstrained period is "yes". Intel made a couple big mistakes in architecture and process and AMD made a couple mistakes before that. It's a bit like watching too exceptionally competent contenders - the winner is frequently not the marginally best player, but the player who didn't make the first mistake. Here, from the comfort of my seat, it's a very entertaining match. I wish there were more players, but neither IBM nor Oracle feel a need to compete in the low-end, and ARM seems destined to eat this cake from its borders.
- bitwize 7y agoYou are forgetting Apple, who are bound to come up with an ARM part that meets or exceeds Intel's performance characteristics with much less power draw Real Soon Now.
- bryanlarsen 7y agoCurrent Apple parts (aka A12X) that are competitive with Intel performance are on a better process node than Intel, have a larger footprint and have comparable power consumption to Intel mobile CPU's. The iPad power advantage is currently mostly OS & chipset, not CPU.
- rbanffy 7y ago> that meets or exceeds Intel's performance characteristics with much less power draw Real Soon Now. That'd more or less break the laws of physics. There are limits of how much (or how little) energy one needs to do a certain amount of computation and, considering all the branch prediction, speculative execution, cache pre-fetches, and all the black magic that we need to extract reasonable single-thread performance from our CPUs, we are pretty close to that limit. We may get away with some ISA and compiler-based optimizations to extract safe no-brainer (as in the CPU doesn't need to worry about it) performance in lower power designs, but it's pretty clear that single-thread performance is the enemy when it comes to power efficiency. And we kind of tried that with VLIW and we didn't get what we expected.
- aiCeivi9 7y ago> Is it too good to be true? It might just not last long enough. Athlon64/X2 also totally destroyed Intel but Core architecture arrived before AMD was able to grab more market share.
- bryanlarsen 7y agoA large part of that was due to illegal action on Intel's part; giving massive rebates to any manufacturer who agreed to go Intel-only. Intel paid AMD $1.25B in compensation. Such tactics won't be available to Intel this time around.
- PedroBatista 7y agoDon't be so sure, Intel always played "dirty" and always worked to make sure they have a huge influence over the major software giants of the time. In the last decades always made sure to present hardware manufacturers with "offers they can't refuse". One of those offers costed them $1.25B more than they expected but was totally worth it. For example, Intel gets a lot of money but also "gives" a lot of money in the form of "incentives" / tip / kickbacks to a lot of hardware manufacturers and the usual palm grease to an army of managers, execs, tech "journalists", governments, etc. To be noted, they also have been competent enough making chips most of the time.
- Symmetry 7y agoSpending down your warchest to pay manufacturers to use your chips isn't something that even Intel can keep up forever. If AMD had kept up their performance lead eventually Intel wouldn't have been able to keep up its kickbacks.
- dralley 7y ago> If AMD had kept up their performance lead eventually Intel wouldn't have been able to keep up its kickbacks. That's hard to do when your R&D budget is shattered. Intel was fined for far less money than they caused damage to AMD.
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- Synaesthesia 7y agoIt’s great that AMD have a competitive or even superior desktop/server processor. I think Intel will still stay competitive in that market. The laptop market is still completely dominated by Intel with no end in sight yet.
- bryanlarsen 7y agoThere are signs that there a lot of Ryzen laptops in the pipeline. For example: https://www.pcworld.idg.com.au/article/662113/computex-2019-amd-claim-50-2019-modern-laptops-will-powered-by-ryzen-mobile/ https://www.pcworld.idg.com.au/article/662113/computex-2019-...
- ksec 7y agoInterestingly in the last thread someone was claiming AMD won't be able to compete in Laptop due to cost issues, and I thought Ryzen 3000 ( Zen + Core ) were not going to do well, I was wrong. There will be lots of Ryzen Laptop coming, for reason that has little to do with Ryzen 3000 in itself, ( The Zen 2 APU will be coming next year ). It is Intel prioritising 14nm capacity for the high margin Sever shipment. Giving AMD a chance in this segment . The timing of these events are.... ( I can't find a word to describe it.)
- ivalm 7y agoTo be fair, it's more "AMD reached parity" while on smaller node (big advantage that presumably will be matched soon-ish). The thread superiority is due to intel locking SMT for market segmentation reasons. In terms of raw core performance AMD has some IPC advantage but lower clocks and higher latency leading to very mixed results. The big question is if Intel can finally transition to lower node for their larger chips. If the answer is yes, AMD will have to work hard to maintain parity, if the answer is no, AMD might actually develop a meaningful lead.
- hajile 7y agoZen 1 CCX is 60mm^2 (cores + L3) and 1.4B transistors. That is 373M transistors for L3 and 1.03B for cores/L1/L2. Zen 2 CCX is 31.3mm^2 according to AMD's slides. The Zen 2 chip is 74mm^2 and 3.9B transistors. We can use this to get the transistors per mm^2 and multiply by the size of the Zen 2 CCX to get a transistor count of 1.65B. Something is weird about these numbers. We go from 1.4B to 1.65B transistors. That seems "reasonable", but something is wrong with our cache figures. Zen 2 has 2x as much L3 cache and the L3 on Zen 1 takes 373M transistors. If we just double that, then Zen 1 is actually larger at 1.77B transistors. If we assume they simply didn't count the extra L3 and attempt to add it back, we get over 4B transistors for the chip when it's only 3.9B transistors (including uncore things like Infinity Fabric). Any way you look at it though, Zen 2 cores can't have many more transistors than their 12nm counterparts, so the node obviously isn't what makes Zen 2 work. Also keep in mind that the 74mm^2 cores are smaller than the 125mm^2 IO Die which is on 12nm. The die shrink was mostly about power savings and fitting two chiplets + IO die on the AM4 package. That said, Intel's 8-core chip is around 175mm^2 (they quit releasing those numbers about the time the 10nm fiasco started). Zen on 14nm was 215mm^2 (keep in mind that Intel's 14nm is roughly equivalent to TSMC's 10nm). AMD's part comes out bigger at the 8-core mark, but things change when we start looking at their larger chips. 10 core Skylake is 322mm^2 and 18-core is 484mm^2. Adjusting for the extra transistors in the zen 2 CCX, Zen 1 would be around 235mm^2 at 14nm. Shrinking to 10nm would give a chip smaller than Intels, but also without an integrated GPU. I'd guess they are about equal in transistor count which means Intel isn't super likely to pull ahead even if they could get 10nm working. https://www.anandtech.com/show/14525/amd-zen-2-microarchitecture-analysis-ryzen-3000-and-epyc-rome/5 https://www.anandtech.com/show/14525/amd-zen-2-microarchitec... https://www.tomshardware.com/reviews/ryzen-9-3900x-7-3700x-review,6214.html https://www.tomshardware.com/reviews/ryzen-9-3900x-7-3700x-r... https://en.wikichip.org/wiki/amd/microarchitectures/zen#Zeppelin https://en.wikichip.org/wiki/amd/microarchitectures/zen#Zepp...
- Symmetry 7y agoInstitutional sclerosis is an ever present threat in any large organization that lives long enough. Occasionally you can see organizations manage a certain amount of remission, see IBM, but very few corporations manage to last longer than a century and this is part of it. Feelings of threat seem to help teams pull together for the good of the company rather than their careers and the most careerist people will avoid underdog companies anyways. But if AMD succeeds enough that'll probably lead to future failure.
- psnosignaluk 7y agoWould it be rude to say that AMD didn't have any other choice and that they needed to bake rapid iterations in their mainstream chips into their (R)DNA or die? (<- that deserves a downvote!) From my lofty perch in my armchair, I consider that from Intel's perspective that Ryzen 1st gen was cute. Ryzen 2nd gen was getting a little closer to home, but still didn't really pose a real issue. Ryzen 3rd gen? It just took a giant dump all over Intel in multithreaded workloads up and down the Z390 SKU's and took a seriously devastating shot at X299...without AMD's 3950X even being available yet. Even where Intel wins, it doesn't win by far enough to crow much. The strange new day that dawned on 7/7 was a good one. As someone who built his first machine on a K6-2 333Mhz chip and his last on an FX 8350, long may it continue. * The other pleasant surprise this weekend was Navi. Better than expected performance. Surprising reduction in power draw. Nicely priced (thanks Super!). Pity that they still haven't gotten over the space heater blower design. Hint guys: it doesn't work. Much cooling...little problem.
- hajile 7y agoI'm surprised that going from TSMC 12nm to 7nm didn't give better power consumption numbers. The combination of better memory and a node shrink seems like it should have bigger effects (though as nodes get smaller, the savings keep diminishing for each shrink). Memory isn't discussed enough and its importance is usually severely underrated. Moving from L1 to a register uses almost 2x as much power as doing an ADD. Moving from L3 to a register uses over 15x as much power as that ADD. Moving from RAM uses over 60x as much power as that ADD.[source](https://hpc.pnl.gov//modsim/2014/Presentations/Kestor.pdf https://hpc.pnl.gov//modsim/2014/Presentations/Kestor.pdf) Navi is a dramatic shift in architecture (despite a lot of people seeming to dismiss it as minor). The new cache design keeps data much more local reducing latency and (more importantly) total power consumption. These in turn allow the more efficient SIMD layout to be fed more consistently. The entire July 7 launch was all about "pipe cleaning" in my opinion. AMD's eye is on those big console and cloud contracts. They aren't selling Amazon or Google a Zen 2. Instead, they are pairing it back-to-back with Zen 3. That will be their second take on 7nm and should have any potential issues worked out. Likewise, they aren't selling these Navi chips to big companies. They will be selling the next, bigger iteration for corporate use. I think PCIe 4 caused them to rush Navi out the door. July 7 has been setup as a kind of makeover for AMD and PCIe 4 is what ties x570, Navi, and Zen 2 together. If AMD doesn't have a PCIe 4 card at launch, it's a huge marketing loss. A half-baked Navi that offers a bit of improvement is better than nothing. I'm betting that performance per watt get quite a bit better by this time next year when the big clients are finally ready to purchase.
- blihp 7y agoIt's a combination of architecture and process that is helping AMD and hurting Intel right now. I don't think it's luck: Intel got complacent and AMD got hungry. We're seeing the effects of 10 years of that on both companies today. While it's possible there is a pile of undiscovered issues that will exclusively impact AMD's processor line, I doubt that's the going to be the case. Intel's issues are far bigger than just x86. They've had major screw-ups and public exits from multiple markets including: mobile, IoT, wireless radios. They appear to be having execution issues generally and their architecture issues started 20+ years ago. This is what technical debt looks like when the bill comes due.