3 ms·
If I understand correctly, the higher memory latency is a between-chiplet problem for the most part, with the highest latencies being between CCX's. If you don
by HeWhoLurksLate 7y ago
If I understand correctly, the higher memory latency is a between-chiplet problem for the most part, with the highest latencies being between CCX's.
If you don't game, I see absolutely no reason not to buy Ryzen, but you might not need to buy an X570 mobo.
- jnordwick 7y agoIntel's L3 is sharded out into 2mb chunks on a ring bus too so I would have expected more comparable numbers. Is Intel's QPI link and cache coherency implemention that much better?