3 ms·
The entire article can be summarized in this paragraph: The problem with Verilog as an ISA is that it is too far removed from the hardware. The abstraction g
by AshamedCaptain 7y ago
The entire article can be summarized in this paragraph:
The problem with Verilog as an ISA is that it is too far removed from the hardware. The abstraction gap between RTL and FPGA hardware is enormous: it traditionally contains at least synthesis, technology mapping, and place & route—each of which is a complex, slow process.
But there is nothing below a netlist that is still mappable to different types of FPGAs (since different FPGAs do not even necessarily need to have LUTs at all, much less the same LUT types!) so I fail to see the use of it.
A GPU ISA changes very little between generations of the GPU, however a rather small change in the structure of the FPGA usually implies a completely new bitstream. So even if there was bitstream documentation it would be very FPGA-specific, unlike an ISA.
P&R does not look that much different from compiling, in the sense that you can spend as much effort as you want on it in order to produce a better or worse result for your machine.
- q3k 7y ago> But there is nothing below a netlist that is still mappable to different types of FPGAs But that's the problem - HDL like Verilog and VHDL are not simple netlist descriptions, but instead a weirdly abstracted away behavioural definition of a circuit that synthesizes into a netlist using tons of (sometimes automagical) heuristics.
- AshamedCaptain 7y agoThey are not "simple netlist descriptions", but they can be used like one. This is what usually one understands when you use the words "RTL" and "Verilog" interchangeably, because when you start with the automagical stuff, you'll find out most P&R tools _cannot_ actually accept those.
- nabla9 7y agoThe solution that emerges is not just a new hardware abstraction for current generation of FPGAs. It would be similar to the abuse of GPU's in the early 2000s. You must design completely new type of Computational FPGAs (CFPGA?) that can have good generic hardware abstraction. It might be something little above the logic blocks and hardware blocs and routing.
- baybal2 7y agoThis is what is called a CPLD. It never attracted much interest.
- ncmncm 7y agoPeople are already making FPGAs. Good luck persuading them to make something else for you.
- RantyDave 7y agoThis has happened (is happening). Intel's latest FPGA's have potentially thousands of floating point multiply/add blocks and Xilinx have a "many cores + on-chip network" design on its way.
- Stratoscope 7y agoReadable version of the quoted paragraph: The problem with Verilog as an ISA is that it is too far removed from the hardware. The abstraction gap between RTL and FPGA hardware is enormous: it traditionally contains at least synthesis, technology mapping, and place & route—each of which is a complex, slow process. (Don't use code formatting for quotes.)