3 ms·
I've never touched CP/NET or MP/M, but I've read up a bit on them, and on CP/M 3 which shares a number of features --- I have to say that I'm not really a fan o
by david-given 7y ago
I've never touched CP/NET or MP/M, but I've read up a bit on them, and on CP/M 3 which shares a number of features --- I have to say that I'm not really a fan of it; there's a lot of extra complexity for a debatable set of improvements, which is why I stuck with CP/M 2.2. (Also I couldn't find a open source CP/M 3 compatible BDOS.)
I do like the FPGA idea --- it feels like a better GA-144. But I'd probably implement it using something based on CP/M 2.2: it would need a BIOS with a remote console and communication channel system, with a switching fabric in the FPGA tying nodes together. I'd also have to rip the filesystem out of the BDOS in favour of something NFS-like over the communication channels, but as that wouldn't really leave anything left, I suspect this would rapidly turn into a combined BIOS/BDOS with most of the actual work done on the file server.
I'm not convinced the end result would be useful... but it'd certainly be cool.
- mechagodzilla 7y agoI think CP/NET is actually pretty close to what you're describing - what the 'server' runs on is actually arbitrary (it just needs to implement the protocol and allow file access), and there is an implementation for unix computers floating around somewhere. The clients were running CP/M 2.2 but with a kind of stub BIOS/BDOS (it sounds like it fit in a 4KB ROM of what's basically a thin client) that mostly just had the network interface code. On an FPGA, just tying together a bunch of cores with 8-bit FIFOs to communicate would be both very cheap and very high performance. I have a simple setup with a Z80 running CP/M at ~80 MHz on a Digilent "Arty" Artix-7 board, and you could probably cram 8 of them on the chip if each core only had a cache backed by DRAM.
- david-given 7y agoOh, huh. I thought it was more heavyweight than that. I'll go take a look. Sadly I don't know enough about FPGAs to know whether the Artix-7 is particularly big or not. But you know what would be _really_ cool, though? If your Z80 cores were all implemented using asynchronous logic...