4 ms·
It was fun seeing their materials refer to their branch predictor as a TAGE predictor. I remember hearing about the original paper for that when I was too young
by microcolonel 7y ago
It was fun seeing their materials refer to their branch predictor as a TAGE predictor. I remember hearing about the original paper for that when I was too young and inexperienced to focus long enough to understand it; then I saw a TAGE predictor show up in Chris Celio's BOOM repository, and I read it through.
If what AMD says is true, the new (for them) TAGE predictor in their industry-leading microarchitecture having 30% fewer branch mispredictions than the last, it feels very cool that one can read and somewhat anderstand the operation of a similar predictor in the leisure hours of a few days.
Also those caches are huge, wow.
- kjeetgill 7y agoIt took a little hunting, is this the paper? http://www.irisa.fr/caps/people/seznec/JILP-COTTAGE.pdf http://www.irisa.fr/caps/people/seznec/JILP-COTTAGE.pdf
- gpderetta 7y agoInteresting; Intel is rumored to use TAGE but it was never confirmed officially. AMD claimed to use a perceptron based predictor in the past.
- emn13 7y agoThey still will, just for L1 only; TAGE is for the lower levels.