RISC-V is an open and flexible CPU ISA, championed by the guy who invented RISC [1]. I recommend this talk [2] by him on the history of CPU architectures, compl

RISC-V is an open and flexible CPU ISA, championed by the guy who invented RISC [1]. I recommend this talk [2] by him on the history of CPU architectures, complexity, and why the time is ripe for RISC-V when x86 and ARM dominate the industry (with some MIPS and PowerPC to round things off). Note that the flexibility aspect means that it's relatively easy to design a chip that uses RISC-V (of which the OP article is an extension for). Designing chips is still out of reach of most hackers, but it does offer hopes of a more accessible landscape of General-Purpose CPUs, DSPs, GPUs, MCUs, etc... [1] https://en.wikipedia.org/wiki/David_Patterson_(computer_scientist) https://en.wikipedia.org/wiki/David_Patterson_(computer_scie... [2] https://californiaconsultants.org/wp-content/uploads/2018/04/CNSV-1806-Patterson.pdf https://californiaconsultants.org/wp-content/uploads/2018/04...