BOOM uses the rocketchip ALU, which uses the Chisel `+`, which probably compiles down to the verilog `+`, which probably gets synthesized to the appropriate wid

BOOM uses the rocketchip ALU, which uses the Chisel `+`, which probably compiles down to the verilog `+`, which probably gets synthesized to the appropriate width adder in the standard cell library of the vendor (e.g. TSMC or Xilinx). So for synthesized microarchitectures, it isn't determined in the RTL.