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It's still a work-in-progress, but there should be some interesting news at the RISC-V Zurich conference next week [1]. For example, Imperas has announced an IS
by _chris_ 7y ago
It's still a work-in-progress, but there should be some interesting news at the RISC-V Zurich conference next week [1]. For example, Imperas has announced an ISA simulator for the current 0.71 version of the specification [2].
[1] (https://tmt.knect365.com/risc-v-workshop-zurich/agenda/1 https://tmt.knect365.com/risc-v-workshop-zurich/agenda/1)
[2] (http://imperas.com/articles/imperas-delivers-first-risc-v-simulator-for-new-vector-and-bit-manipulation-specifications http://imperas.com/articles/imperas-delivers-first-risc-v-si...)
- childintime 7y ago> at the RISC-V Zurich conference next week Curiously this session is only 15 minutes long. June 11, 17:45 - 18:00, by Krste Asanovic. Nevertheless it is quite promising: "Vector Extension 0.7. The vector extensions have reached a major milestone with the release of version 0.7, which is intended for widespread implementation and comment". Excellent news.
- _chris_ 7y agoThere were a ton of talk submissions, and the schedule is incredibly tight because of it. =(