It basically eliminates the "paging" abstraction, and lets the storage controller, with specific knowledge of the hardware implementation, to intelligently do t

It basically eliminates the "paging" abstraction, and lets the storage controller, with specific knowledge of the hardware implementation, to intelligently do the minimum necessary reads/writes with the actual hardware to express the desired changes. It makes me wonder how locking/race conditions/consistency is implemented since that's one of the features of the page abstraction that's not obviously addressed with this tech.