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The power dissipation problem of current chips (performance is almost always power/thermal limited) is correlated with 2D structures. Communication is one giant
by sephamorr 7y ago
The power dissipation problem of current chips (performance is almost always power/thermal limited) is correlated with 2D structures.
Communication is one giant problem: 3D structures could allow for far better colocation of connected compute elements, so we might not have to spend most of our power budget feeding data in and out of compute clusters.
Scaling in 2D does make this problem easier (in some ways!), much as adding a 3rd dimension would too.
- stcredzero 7y agoThe power dissipation problem of current chips (performance is almost always power/thermal limited) is correlated with 2D structures Graphene thermal pads have really phenomenal lateral thermal conductivity. 3D computer chips could be constructed of alternating silicon and thermal graphene layers, perhaps conducting to a central core, which could be made of copper or could even contain water or a heat pipe. https://www.youtube.com/watch?v=YpphKzmDiJM https://www.youtube.com/watch?v=YpphKzmDiJM