Understood but we're talking about different things I think (though this is very much not my area). You're saying volatile is acting as a kind of memory barrie

Understood but we're talking about different things I think (though this is very much not my area). You're saying volatile is acting as a kind of memory barrier instruction for the compiler - got it. But I'm saying I understand that at the CPU level, just considering x86 instructions, writes don't have to be forced to RAM, despite a common assumption that they are; they can remain in caches. See johntb86's reply confirming this.