4 ms·

Can't drive memory bandwidth? I can saturate any memory interface with ease. All line rate Ethernet systems (pushing 100+ Gb/s now) are done with FPGAS. What ar

Can't drive memory bandwidth? I can saturate any memory interface with ease. All line rate Ethernet systems (pushing 100+ Gb/s now) are done with FPGAS. What are you talking about?? I can program a kintex ultrascale @ 16 bits transmitted at something like 100Mhz. The system is up fully in less than 5msec from power good. This feature is used in every system where milliseconds count - including military systems. Are you confusing JTAG reconfiguration speeds with production configuration speeds? I'm very confused by what you said, can you elaborate?

foobiekr 7y ago
NPUs like Tomahawk, etc are not FPGAs.
- analognoise 7y ago
  Not in their final version, no. I see what you meant - I should have said "are developed with". Lemme edit that. https://store.digilentinc.com/netfpga-sume-virtex-7-fpga-development-board/ https://store.digilentinc.com/netfpga-sume-virtex-7-fpga-dev... But for 7k you can get an older design with 4x 10Gbps Ethernet. It's used at Stanford and Cambridge for... High speed network processing research. High speed trading firms almost universally use FPGAs. You can't go faster without custom silicon. But you can sure as shit max out as many DDR and network interfaces as you can physically attach.
  - foobiekr 7y ago
    10G is a very slow speed at this point. But yes, there are very good use cases for FPGAs.
alain94040 7y ago
16 bits transmitted at something like 100Mhz That's 1.6 Gbit/s. Looking up random Intel Xeon, specs, the memory bandwidth from the CPU to memory is 100 Gbytes/s. That's 1000X more than what you are describing.
- analognoise 7y ago
  You only need to pass a bin file to program an FPGA - it's like 20Mbits (hence a few msec). Memory interfaces are not the same as the reconfiguration programming interface. The memory interfaces (to external memory) are standardized - DDR3/4. Are you talking about to a L1 cache? Because all of the equivalent in an FPGA (BRAM, in Xilinx terminology) is accessible within a single clock cycle on an FPGA (assuming you can meet P&R/timing). Each DDR4 chip can do something like 20Gbit/sec, I can fit 5 of them on a KCU115 1924... And that's external memory. Internally there is BRAM (and it's newer variants, which means you don't even have to go off chip).

foobiekr 7y ago

NPUs like Tomahawk, etc are not FPGAs.

analognoise 7y ago
Not in their final version, no. I see what you meant - I should have said "are developed with". Lemme edit that. https://store.digilentinc.com/netfpga-sume-virtex-7-fpga-development-board/ https://store.digilentinc.com/netfpga-sume-virtex-7-fpga-dev... But for 7k you can get an older design with 4x 10Gbps Ethernet. It's used at Stanford and Cambridge for... High speed network processing research. High speed trading firms almost universally use FPGAs. You can't go faster without custom silicon. But you can sure as shit max out as many DDR and network interfaces as you can physically attach.
- foobiekr 7y ago
  10G is a very slow speed at this point. But yes, there are very good use cases for FPGAs.

alain94040 7y ago

16 bits transmitted at something like 100Mhz That's 1.6 Gbit/s. Looking up random Intel Xeon, specs, the memory bandwidth from the CPU to memory is 100 Gbytes/s. That's 1000X more than what you are describing.

analognoise 7y ago
You only need to pass a bin file to program an FPGA - it's like 20Mbits (hence a few msec). Memory interfaces are not the same as the reconfiguration programming interface. The memory interfaces (to external memory) are standardized - DDR3/4. Are you talking about to a L1 cache? Because all of the equivalent in an FPGA (BRAM, in Xilinx terminology) is accessible within a single clock cycle on an FPGA (assuming you can meet P&R/timing). Each DDR4 chip can do something like 20Gbit/sec, I can fit 5 of them on a KCU115 1924... And that's external memory. Internally there is BRAM (and it's newer variants, which means you don't even have to go off chip).