4 ms·

It's missing the below 5 cents microcontrollers: https://lcsc.com/product-detail/PADAUK_PADAUK-Tech-PMS150C_C129127.html https://lcsc.com/product-detail/PADAUK

• sgt 8y ago
  How is the documentation on those?
  • louky 8y ago
    Not great, Dave from EEVblog did a few videos on them and how to use them. I think they're all OTP https://www.youtube.com/watch?v=Rixo78hv_lw https://www.youtube.com/watch?v=Rixo78hv_lw
    • cstuder 8y ago
      OTP = One-time programmable
  • coupdejarnac 8y ago
    Fine if you can read Chinese. There are several discussions about them at eevblog, with many people having success. It's probably the best place to get information in English.
    • mrb 8y ago
      The datasheet covers hardware + software (instruction encoding, I/O registers) and it's all in english here: https://datasheet.lcsc.com/szlcsc/PADAUK-Tech-PMS150C_C129127.pdf https://datasheet.lcsc.com/szlcsc/PADAUK-Tech-PMS150C_C12912...
  • jdietrich 8y ago
    Surprisingly acceptable. The datasheets are reasonably legible and there's a weird but perfectly usable SDK. Padauk clearly don't care about the hobbyist market or more specialised applications that require certification or long-term availability, but their offering seems like an entirely reasonable choice for low-cost, mass-market products.
• bmcooley 8y ago
  I looked through the datasheet, but couldn't figure out what "1KW" of program memory meant.
  • saagarjha 8y ago
    Looks to be a typo for 1 KiB, since the address space seems to go from 0x0 to 0x3FF.
  • skykooler 8y ago
    1 thousand words, probably.
  • magicalhippo 8y ago
    It's supposed to be 1kW, ie 1024 words.
• koala_man 8y ago
  A 1,000 cpu cluster for $29. Nice.
  • zaarn 8y ago
    A MCU is sadly not a CPU, for example, most use the harvard architecture, meaning code memory is in ROM and uses a separate address space than data, which usually lives in SRAM. This limits a lot of things you could possibly do. RAM is also very very limited and you have to use it for any data you put on the stack as well as on the heap. You could however, emulate a very very weak and simple CPU on it.
    • RealityVoid 7y ago
      I think it's a stretch to say "most [MCUs] use the harvard architecture, meaning code memory is in ROM and uses a separate address space than data" since I have not encountered so far not even one device (in the about a dozen or so that I worked with in real life) that actually had a different address space for RAM than ROM. I will say that for the particular one that OP linked above, this does seem the case since the datasheet mentions "ll the 64 bytes data memory of PMS150C can be accessed by indirect access mechanism."
      • zaarn 7y ago
        Your compiler or assembler might abstract it for you but most (basically anything smaller than an ARM Cortex-M) will have harvard architecture. Some MCU's ran run programs from RAM but IIRC they do it by loading RAM into Code Memory and then executing it, it looks like VN from the outside but isn't quite on the inside. Harvard doesn't specify if you need an indirect access mechanism, plenty of HV computers can access their code memory fairly normally (either by using a special bit in the bus or opcode or mapping it into a unused section of normal address space). Harvard simply means that Code and Data come from a separate bus and in most cases that means separate devices. If your MCU has two seperate specs for Flash/EEPROM as Data and Program Memory, then it's 100% Harvard. And that's basically most of them.