> So there's no standardization on how to talk to devices at the hardware level. Some CPUs have protection systems, an "I/O MMU", and there have been various ch

> So there's no standardization on how to talk to devices at the hardware level. Some CPUs have protection systems, an "I/O MMU", and there have been various channel-like interfaces, especially from Intel, but they have never caught on. From the paper: > NVMe SSDs perform I/O faster than the OS can accept new I/O requests and notify their completion. Furthermore, the current POSIX AIO implementations in Linux are ugly and adhoc, and they have limited support from file systems. This has lead to new AIO interfaces that eliminate system calls and leverage polling. However, polling for completion is not suitable for large I/O transfers. AWS Nitro SR-IOV I/O virtualization [1] uses Intel VT-d Posted Interrupts [2] to avoid polling, but this CPU feature is price-segmented to Xeon E5 and higher. For other CPUs, polling [3] is necessary to achieve high IOPS with NVME. Intel and AMD should consider making this feature available on all CPUs, to support NVME and NVDIMM. [1] SR-IOV: https://www.snia.org/sites/default/files/RonEmerick_PCI_Express_IO_Virtualization.pdf https://www.snia.org/sites/default/files/RonEmerick_PCI_Expr... & https://www.twosixlabs.com/running-thousands-of-kvm-guests-on-amazons-new-i3-metal-instances/ https://www.twosixlabs.com/running-thousands-of-kvm-guests-o... [2] IOMMU: https://www.linux-kvm.org/images/7/70/2012-forum-nakajima_apicv.pdf https://www.linux-kvm.org/images/7/70/2012-forum-nakajima_ap... [3] Polling: https://events.static.linuxfound.org/sites/events/files/slides/lemoal-nvme-polling-vault-2017-final_0.pdf https://events.static.linuxfound.org/sites/events/files/slid... & https://www.snia.org/sites/default/files/SDC/2018/presentations/Cloud_Storage/Yang_L_Zhu_D_Achieving_10-Million_IOPS_from_a_single_VM_on_Windows_Hyper-V.pdf https://www.snia.org/sites/default/files/SDC/2018/presentati...