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It seems like they plan to shift to novel hybrid architectures, at least if things like Intel owning Altera mean anything. I'd expect them to be doing things li

It seems like they plan to shift to novel hybrid architectures, at least if things like Intel owning Altera mean anything. I'd expect them to be doing things like putting neural network accelerators down and the like. Or everyone has to make a dramatic leap to a new underlying computing physics, like the quantum dot transistor or the vacuum transistor [1] that lets them increase frequency or lower power consumption. If you double the clock frequency, I believe this still linearly increases the computing throughput, though I'm not expert enough to know if that's still strictly true. [1] https://spectrum.ieee.org/semiconductors/devices/introducing-the-vacuum-transistor-a-device-made-of-nothing https://spectrum.ieee.org/semiconductors/devices/introducing...

apcragg 8y ago
A big problem with increasing the clock speed is that your processor still needs to wait for the DRAM to respond. Modern processors are crazy smart about prefetching, caching, and running instructions in parallel, but at some point Memory bandwidth and latency begin to dominate over CPU clock speed. Many players have started looking at puting multiple dies on the same substrate with high-speed interconnects to reduce memory latency and improve throughput. Those improvements could help push the usefulness of higher clocks a bit further.
- neltnerb 8y ago
  Is it roughly accurate to say that if your computing area operates at 10x the speed, you can do 10 cores worth of computing work with one core? That would free up a lot of die area for other things, though I don't know how to guess how much that extra space would improve the other bits. I'd kind of figure that such a technology would also speed up the RAM, but I suppose that's not true either if the underlying storage technology is too slow. But I know that's also an area of active research.
  - analognoise 8y ago
    In CMOS the killer is that they consume power when switching (power ends up being a square of switching frequency). So if you switched. 10x, you'd have to somehow dissipate 100x the power. Your core might be small, but the industrial-sized refrigerator needed to cool it suddenly isn't.
    - baybal2 8y ago
      I thought recently, given how bad leakage gets at <10nm, why not to go back to RCL or TTL logic? A similar line of thinking lead to source-coupled logic being resurrected for use in high speed PHYs https://en.wikipedia.org/wiki/Current-mode_logic https://en.wikipedia.org/wiki/Current-mode_logic
    - neltnerb 8y ago
      My question had the assumption of something akin to vacuum transistors that allow high frequencies without the heat generation, but yes, I agree that the current technology won't scale by 10x without a generational shift in underlying approach away from MOSFETs.
analognoise 8y ago
What? No. As far as computing goes, the digital abstraction still and will always hold unless we start doing analog computations like were done with analog computers from the 1940's to about the 1960's (in the West, they lasted longer in Russia due to their inability to compete in Silicon). A vacuum transistor, used as a switch, is still a switch.
- neltnerb 8y ago
  FWIW, I believe there's a theorem that given an allowable error rate in a digital computation was literally equivalent to a noise level in an analog computation. I agree that they are cool, especially for things like feedback and asynchronicity, but I'm not sure that they're fundamentally going to give us that much better results quantitatively.
mjfl 8y ago
I feel like neural network accelerators are too small a market to replace their microprocessor business.
- steve_musk 8y ago
  Might be fun to look back at this comment in 10 years
- neltnerb 8y ago
  But on-chip FPGAs that reconfigure to enable specialized hardware might be enough to differentiate their product line. And being able to say you support DirectCNN 9.0 on your CPU isn't so absurd... I have the feeling a neural network accelerator will be no more surprising than a floating point unit in 20 years.
deleted 8y ago
[deleted]

apcragg 8y ago

A big problem with increasing the clock speed is that your processor still needs to wait for the DRAM to respond. Modern processors are crazy smart about prefetching, caching, and running instructions in parallel, but at some point Memory bandwidth and latency begin to dominate over CPU clock speed. Many players have started looking at puting multiple dies on the same substrate with high-speed interconnects to reduce memory latency and improve throughput. Those improvements could help push the usefulness of higher clocks a bit further.

neltnerb 8y ago
Is it roughly accurate to say that if your computing area operates at 10x the speed, you can do 10 cores worth of computing work with one core? That would free up a lot of die area for other things, though I don't know how to guess how much that extra space would improve the other bits. I'd kind of figure that such a technology would also speed up the RAM, but I suppose that's not true either if the underlying storage technology is too slow. But I know that's also an area of active research.
- analognoise 8y ago
  In CMOS the killer is that they consume power when switching (power ends up being a square of switching frequency). So if you switched. 10x, you'd have to somehow dissipate 100x the power. Your core might be small, but the industrial-sized refrigerator needed to cool it suddenly isn't.
  - baybal2 8y ago
    I thought recently, given how bad leakage gets at <10nm, why not to go back to RCL or TTL logic? A similar line of thinking lead to source-coupled logic being resurrected for use in high speed PHYs https://en.wikipedia.org/wiki/Current-mode_logic https://en.wikipedia.org/wiki/Current-mode_logic
  - neltnerb 8y ago
    My question had the assumption of something akin to vacuum transistors that allow high frequencies without the heat generation, but yes, I agree that the current technology won't scale by 10x without a generational shift in underlying approach away from MOSFETs.

analognoise 8y ago

What? No. As far as computing goes, the digital abstraction still and will always hold unless we start doing analog computations like were done with analog computers from the 1940's to about the 1960's (in the West, they lasted longer in Russia due to their inability to compete in Silicon). A vacuum transistor, used as a switch, is still a switch.

neltnerb 8y ago
FWIW, I believe there's a theorem that given an allowable error rate in a digital computation was literally equivalent to a noise level in an analog computation. I agree that they are cool, especially for things like feedback and asynchronicity, but I'm not sure that they're fundamentally going to give us that much better results quantitatively.

mjfl 8y ago

I feel like neural network accelerators are too small a market to replace their microprocessor business.

steve_musk 8y ago
Might be fun to look back at this comment in 10 years
neltnerb 8y ago
But on-chip FPGAs that reconfigure to enable specialized hardware might be enough to differentiate their product line. And being able to say you support DirectCNN 9.0 on your CPU isn't so absurd... I have the feeling a neural network accelerator will be no more surprising than a floating point unit in 20 years.

deleted 8y ago

[deleted]