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Isn't there a Python based dialect for that already ? I think it was named cirrus but I can't find any link to it. Anyway, it seems to be it would be better to

• speedplane 7y ago
  > Isn't there a Python based dialect for that already ? ... Anyway, it seems to be it would be better to make a lib for this than a whole language. FPGA programmers are quite a different breed than python developers. Things that are simple in programming languages (e.g., multiplication) can create real issues in an FPGA. I'm normally all for simplifying and unifying semantics, but with hardware programming, a split is justified.
  • sametmax 7y ago
    Libs can track what a verilog integration system can check, and do that at a higher level. Qualcomm don't write all verilog or system c by hand, they have software generating it.
    • tejuis 7y ago
      What are they using as source then? Please let us know more?
      • sametmax 7y ago
        I know that some qualcomm tools use IP described in a python dialect, and then generate the verilog out of it. They have a whole synthesis system on top of that. I assume they are not alone.
• sanxiyn 7y ago
  > Anyway, it seems to me it would be better to make a lib for this than a whole language. This is a Racket library. The whole point of Racket is that you can make a language as a library.
  • sametmax 7y ago
    I am a strong opponent to most DSL. They usually make life harder, not easier, and a regular lib is most of the time a better choice.
• q3k 7y ago
  > Isn't there a Python based dialect for that already? There's Migen (which is like Fairylog - a preprocessor/macro system for RTL) and MyHDL (which lets you write Verilog using a subset of 'synthesizable' Python).