Actually, cmos input stages are high impedance, i.e. high resistance, and therefore have close to no current flowing between state changes. The output stage sho

Actually, cmos input stages are high impedance, i.e. high resistance, and therefore have close to no current flowing between state changes. The output stage should be very low impedance if driving loads, or very high impedance if turned of. Indeed, switching between states, saturating the gates with enough electrons is the problem that generates heat, when there is voltage and resistance visible for the following node. At that scale, the small resistance of the connections plays a role, too, sure.