4 ms·
I found this line interesting: “All of the reasonable designs that have been developed have been a lot closer to each other than people expected.” It feels (to
by glhaynes 8y ago
I found this line interesting: “All of the reasonable designs that have been developed have been a lot closer to each other than people expected.”
It feels (to me, who is admittedly not a hardware person) as though instruction sets haven’t really been that important aside from a brief moment when RISC seemed revolutionary.
- nabla9 8y agoIntel, Alpha, ARM, SPARC, have clever legacy quirks and hacks. VLIW's, stack machines, tagged architectures etc. never took off. RISC-V is the newest and coolest completely new instruction set. It's also one of the the most reasonable, practical and boring instruction sets you can imagine. It's basically updated and cleaned MIPS-style ISA with minimal surprises.
- rbanffy 8y agoFor modern high performance CPUs the benefit of RISC in terms of simpler/faster decoding fade a bit in relation to the memory bandwidth benefit of more concise instructions. Still, a lot of die space is dedicated to interpret x86 instructions and issue operations for the backend. I wouldn't mind having that silicon dedicated to more threads (which mean fewer context switches) or a larger cache (which somewhat negates the advantages of a more concise code)
- nabla9 8y agoRISC-V has compressed instruction subset that reduces code size 25-30%.
- rbanffy 8y agoHaving a compressed ISA AND a smaller decoder is a win-win. There are, sadly, non-intrinsic reasons why x86 holds the position it does - nobody has the kind of money Intel has to invest in high-performance desktop CPUs. The few companies that do either go after the x86 market or ignore the desktop and low/mid-range server niche.