> Straight-up RISC-V is too new to truly trust security, but looks fairly great... Bad analogy because Risc-V is an instruction set, not a physical microarchit

> Straight-up RISC-V is too new to truly trust security, but looks fairly great... Bad analogy because Risc-V is an instruction set, not a physical microarchitecture. Back doors and side channel attacks could still be possible when implementing risc-v as a uarch. The same applies for any ISA be it MIPS, x86-64, Power, Arm, Spark, PA Risc, Alpha, etc. They're just different programming languages implemented in hardware. And like software, hardware can have bugs too, though patching is much harder or impossible.