4 ms·
I don't know much about SIMD but are there no alignment concerns with reinterpreting a slice as an AVX vector?
by eridius 8y ago
I don't know much about SIMD but are there no alignment concerns with reinterpreting a slice as an AVX vector?
- ajtulloch 8y agoUnaligned and aligned loads of AVX vectors have basically the same performance since Ivy Bridge IIRC.
- jnordwick 8y agoI was under the impression that unaligned ops ran at the same speed, but they used up more register ports, so it does reduce memory bandwidth between the register file and cache. Or does this no longer apply either?
- a1369209993 8y agoMy understanding is that the first unaligned load uses more register ports[0], but a second (third, etc) contiguous load doesn't. IANA[intel microarchitechure expert] though. 0: Or more memory bandwidth anyway.