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I nearly had an incident in a MIPS assembly class. There was a fairly basic data structures assignment that I had submitted only to be called into the professor
by mooman219 8y ago
I nearly had an incident in a MIPS assembly class. There was a fairly basic data structures assignment that I had submitted only to be called into the professor's office being accused of plagiarism. The program used aggregates all submissions over the lifetime of the class and compares them.
Because of how basic the assignment was, and how rigid assembly is, there's a baseline ~40% match with all assignments, and mine just happened to hit ~50% and that was grounds for plagiarism. The match was for some submission 6 years prior.
At the time I took backups of school projects on save and could replay the history and walk through my design which was enough to convince the professor. There were at least 3 other students roped into this and were probably not as lucky.
- stordoff 8y agoMy university basically did a viva to get around this. They know they can't prevent you from copying the code, but they _can_ make sure you understand it well enough to walk through it and be able to explain why you did things, and ultimately that's more important. They also biased _heavily_ in favour of exams (practicals are essentially something you had to do, but are ungraded), where there is no (reasonable) opportunity for plagiarism.
- hermitdev 8y agoI studied electrical and computer engineering in college. One of the classes was a hardware/software codesign class. There was a graded lab component, i.e. We had to design and build a circuit for the given purpose, hook it up to a bare-bones computer w/ a 68K chip and write assembly to drive the circuit and pass a set of tests. Each lab was typically booked as 2 3-hour sessions (one session per week). I lived off campus, and the commute was about an hour, in good traffic, so I wanted to minimize the number of times I had to go to campus. Unlike the students that lived on campus, I was methodically prepared walking into the first session. I'd probably have spent 6-8 hours on a weekend working on the lab. I was meticulous. I designed the circuit using Visio (obviously can't simulate, but I was concerned with layout), so I had precise diagrams of the circuit. My diagrams matched the layout of the bread board, and my physical implementation was clean (wires were always just as long as they needed to be and never longer). I could take the diagram and literally check off wires as I placed them (and my wiring was clean). I had my 68K assembly written ahead of time and was generally bug-free, though some debugging was needed from time-to-time. I was generally in and out of lab in 15 minutes of what was supposed to be a 6 hour session. After a few rounds of this, my TA suspected I might be cheating and he walked up, ripped out a bunch of random wires from my circuit and told me to fix it. I chuckled, said ok, and I pulled out my design, replaced the wires and checked them all off, plugged it back in and it passed. He was dumbfounded. He sort of had a "Wow, a student that's actually prepared for lab for once" kind of look on his face. He never bothered me again. I think the TA was doubly surprised because I also had a habit of obviously sleeping during lecture, dead center in the front row.
- 0xb100db1ade 8y agoMay I ask how you made backups on save? What you described sounds like it might come in handy some time for me personally
- zrobotics 8y agoA git repository would suffice, just commit throughout the project as normal.
- mcpherrinm 8y agoVim supports an undofile, to keep undo history persistently. https://jovicailic.org/2017/04/vim-persistent-undo/ https://jovicailic.org/2017/04/vim-persistent-undo/ IntelliJ has a feature called "Local History" which stores basically is storing undo history, but it stores other things too (like test execution). https://www.jetbrains.com/help/idea/local-history.html https://www.jetbrains.com/help/idea/local-history.html