4 ms·
The best you can do for an ARM latency table is ddging "aXX optimization guide" a57: http://infocenter.arm.com/help/topic/com.arm.doc.uan0015b/Cortex_A57_Soft
by 0xfaded 8y ago
The best you can do for an ARM latency table is ddging
"aXX optimization guide"
a57: http://infocenter.arm.com/help/topic/com.arm.doc.uan0015b/Cortex_A57_Software_Optimization_Guide_external.pdf http://infocenter.arm.com/help/topic/com.arm.doc.uan0015b/Co...
a72: http://infocenter.arm.com/help/topic/com.arm.doc.uan0016a/cortex_a72_software_optimization_guide_external.pdf http://infocenter.arm.com/help/topic/com.arm.doc.uan0016a/co...
Notably not public is the a53 version of this document. I did some work getting ORB_SLAM to run on the raspberry pi a couple years ago. My conclusion was that the instruction timings for NEON instructions are more or less the same as the a57, but just remember there are only two instructions issued per cycle and everything is in order.
Edit: replace google with ddg
- glangdale 8y agoI've seen those. We also can get A55, A75 but notably not A76 either. And what's there is... terse. But generally OK (not a fan of the blank spot in latency/throughput tables, regardless of who is doing it). Sadly, ARM is the exception - Ampere, Marvell/Cavium and Apple don't have a _whiff_ of information like this out there.