I'm surprised their threaded interpreter was slower than switch, this doesn't reflect my benchmark as well even for post-Haswell CPU. Also this is not true on

I'm surprised their threaded interpreter was slower than switch, this doesn't reflect my benchmark as well even for post-Haswell CPU. Also this is not true on non-x86 hardware and I unfortunately didn't test on AMD. The article should at least cite this paper regarding Haswell branch prediction: https://hal.inria.fr/hal-01100647/document https://hal.inria.fr/hal-01100647/document "Branch Prediction and the Performance of Interpreters - Don’t Trust Folklore", 2015, Rohou et al. Also I'm leaving my interpreter optimization resources here with decades of research papers and highlights of the techniques I found most interesting when implementing a fast VM: https://github.com/status-im/nimbus/wiki/Interpreter-optimization-resources https://github.com/status-im/nimbus/wiki/Interpreter-optimiz...