> x86 isn't RISC and not all operations take the same number of cycles. Yes but it doesn't say instructions per hash, it says cycles per hash. Unless some kin

> x86 isn't RISC and not all operations take the same number of cycles. Yes but it doesn't say instructions per hash, it says cycles per hash. Unless some kind of frequency scaling is going on, the number of cycles per second should be very consistent. If bytes/hash is held constant and cycles/second is constant, then MiB/second and cycles/hash should be exact inverses. I don't understand why this is not the case in these tables. > Also, the code might have different levels of possible parallelism and might impact the pipeline differently. Again this can affect the number of instructions being retired, but not the number of cycles. A cycle is a cycle, regardless of how much work is actually being accomplished. > Comp Sci education for the low level basics is often completely neglected nowadays. This should be freshman year stuff. I'm a low-level junkie who lives in godbolt.org and Agner Fog's tables, writes JIT compilers, and does FPGA design for fun on the side. It's possible that I'm mistaken here, but I do have a fair amount of background in this.