> I'm surprised ARM-designed cores haven't pushed harder to eliminate AArch32 at the higher exception levels It seems like they are very slowly phasing it out

> I'm surprised ARM-designed cores haven't pushed harder to eliminate AArch32 at the higher exception levels It seems like they are very slowly phasing it out and heading to 64-bit only. A32 ISA is only supported in userspace mode (EL0) on the Cortex-A76[1]. [1] https://www.theregister.co.uk/2018/05/31/arm_cortex_a76/ https://www.theregister.co.uk/2018/05/31/arm_cortex_a76/