3 ms·
This is true in an abstract comparison between fixed and variable length encodings, but not really true in the specific comparison of AArch64 and x86: the latte
by BeeOnRope 8y ago
This is true in an abstract comparison between fixed and variable length encodings, but not really true in the specific comparison of AArch64 and x86: the latter is far from an ideal fixed-length encoding, largely because of path dependent development of the current ISA.
A significant amount of space is wasted on old rarely used instructions, and the x86-64 encoding was chosen mostly based on similarly with the earlier 32-bit ISA, which uses decades old instruction frequencies. The addition of many ISA extensions has become progressively more difficult: the newest AVX-512 instructions which use the EVEX encoding have 4 (!!) prefix bytes before the instruction even starts. So just the prefix is as long as any AArch64 instruction.
The net result is that AAarch64 binary sizes are largely comparable with x86, and there is still a bit of juice to squeeze out as well as the ARM compiler backends haven't had the same decades of heavy optimization compared to x86.
- Symmetry 8y agoAlso, ARM is one of the densest RISC-style ISAs. A64 less so than A32 but it still has things like conditional execution of some of the most common instructions, loading two registers in one instruction, etc.
- pcwalton 8y agoYup. Not to mention all the REX prefixes which add a byte to nearly every instruction.