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>> those parts are already pushing their envelope, or are you implying Apple is specifically wasting money on their chips? I would say the envelope Apple is pu

>> those parts are already pushing their envelope, or are you implying Apple is specifically wasting money on their chips? I would say the envelope Apple is pushing with their designs is currently almost exclusively bound by the working environment their SoC's run in: limited cooling and limited battery. They probably spend more time optimizing their software to make more efficient use of their chips than optimizing their cooling solution, because there simply is no room for fans and airflow. That does not say anything about how suitable these chips could be with better cooling though. The fact that they are optimized for low power does not mean they cannot, or be redesigned minimally, to run at higher clock speeds. In fact, that's exactly what Apple is already doing, by using virtually identical variations of their SoC's across iPhone, iPad and AppleTV, running at different clock speeds. >> are you sure you don't want to check in with any of those facts of yours before pursuing further conversation? >> this seems a good time to remind how clock speed and chip features are intertwined with yeld and impurities I don't know why you need to be so dismissive and agressive in your comments, especially since so far you have not brought up anything countering any of the arguments made by anyone else in this thread. Maybe you can address the observation already made by dotaro about Intel making literally 20 different variations of the same CPU's, scaling from the ULV end with low clock speeds and limited cooling options, all the way up to the HPC end where clock speeds, TDP, etc. are large multiples of what goes into the ULV parts? What makes you think this is only possible with x86 chips and not with the ARM-based designs Apple uses? Do you think each variation of an Intel x86 chip from the same generation is a completely different design that was built from the ground up to fit that particular use case? You seem to be stuck on equating having the option of a better cooling solution so you can push the design of e.g. an A12 chip to higher clock speeds and close the already small gap with x86 chips, with going full-scale Netburst architecture with low IPC compensated by crazy clock speeds and ultra-deep pipelines, by means of nothing more than pushing an imaginary turbo button and call it a day. Nobody suggested that but yourself.

0815test 8y ago
> Maybe you can address the observation already made by dotaro about Intel making literally 20 different variations of the same CPU's, scaling from the ULV end with low clock speeds and limited cooling options, all the way up to the HPC end where clock speeds, TDP, etc. are large multiples of what goes into the ULV parts? Just because you can scale down an HEDT- or HPC-focused design to the point of making it run as a ULV chip under very challenging thermals, doesn't mean that the resulting chip will perform very well. We've seen this time and time again with x86 vendors trying and failing to enter the lucrative "mobile" segment. And it's not clear why we should expect a different outcome when mobile-focused vendors try the reverse play, by attempting to "scale up" their existing designs. One size very much doesn't fit all in the semiconductor industry.
- Symmetry 8y ago
  Exactly. Part of the reason that Apple's chips do so well against Intel at a given power level is that there Apple is operating at the frequencies their chips are designed for whereas Intel is far away from their sweet spot. You can cover a variety of power targets with one microarchitecture but you're going to do so less efficiently when you're far away form your design point. And while I bet you could overclock an Apple core somewhat if you used liquid nitrogen or whatever it will still have more logic between clock latches than an Intel processor does. That deeper pipelining means that Intel will be able to clock higher than you can for any given process/voltage/temperature combination. Apple has some very talented CPU architects and I'm sure they could design a high performance chip. But it won't be the same one that runs in iPhones.
LoSboccacc 8y ago
> Maybe you can address the observation it's addressed. it's literally on the first line of the comment you're replying to. > limited cooling options and again, you can't just 'cool away' leakage currents, that's not how it works, that's not how any of this works.
- Symmetry 8y ago
  If you mean "they have less cache on board, less cores, different integrated gpu; they don't support higher frequency ddr and they have limits on the memory bandwidth" then no, that doesn't address the point. Intel does have different chips with all of those changed. But they also have SKUs with all of those the same but different power budgets and different frequencies. And really things like cache barely use any power at all in the overall context of the chip. SRAM, especially the 8T SRAM Intel uses, is very efficient. > you can't just 'cool away' leakage currents You certainly can, the leakage current is going to be proportional to (1-e^(-qV/KT)) so better leakage will tend to go down exponentially at lower temperatures. Yes, I know what you actually meant and you're still wrong there because if you have better cooling you can accept more leakage, meaning you can use a process with a lower threshold voltage and accept the larger amount of leakage current that results.
  - LoSboccacc 8y ago
    > if you have better cooling you can accept more leakage again, no, better cooling stave off the thermal runway effect. you can think of it as generating less leakage per voltage unit, which is quite the opposite as accepting more leakage. higher operating voltage allows for accepting more leakage. and there's still no indication that cooling a specific chip design (because we're not talking about chips in general here) would prevent thermal issue within the chip, because you can only work on reducing the average surface temperature opposite to the pins - or, you can't just pick a single part of the argument and disprove it in isolation, because the whole thermal issue is not a premise, but ties in the whole claim of "we could just make this chip run with cooling at it'll beat down intels" - which they cannot, because you can't just cool away leakage currents, the chip has to be meant to be cooled and to be run with higher voltage at design phase.

0815test 8y ago

> Maybe you can address the observation already made by dotaro about Intel making literally 20 different variations of the same CPU's, scaling from the ULV end with low clock speeds and limited cooling options, all the way up to the HPC end where clock speeds, TDP, etc. are large multiples of what goes into the ULV parts? Just because you can scale down an HEDT- or HPC-focused design to the point of making it run as a ULV chip under very challenging thermals, doesn't mean that the resulting chip will perform very well. We've seen this time and time again with x86 vendors trying and failing to enter the lucrative "mobile" segment. And it's not clear why we should expect a different outcome when mobile-focused vendors try the reverse play, by attempting to "scale up" their existing designs. One size very much doesn't fit all in the semiconductor industry.

Symmetry 8y ago
Exactly. Part of the reason that Apple's chips do so well against Intel at a given power level is that there Apple is operating at the frequencies their chips are designed for whereas Intel is far away from their sweet spot. You can cover a variety of power targets with one microarchitecture but you're going to do so less efficiently when you're far away form your design point. And while I bet you could overclock an Apple core somewhat if you used liquid nitrogen or whatever it will still have more logic between clock latches than an Intel processor does. That deeper pipelining means that Intel will be able to clock higher than you can for any given process/voltage/temperature combination. Apple has some very talented CPU architects and I'm sure they could design a high performance chip. But it won't be the same one that runs in iPhones.

LoSboccacc 8y ago

> Maybe you can address the observation it's addressed. it's literally on the first line of the comment you're replying to. > limited cooling options and again, you can't just 'cool away' leakage currents, that's not how it works, that's not how any of this works.

Symmetry 8y ago
If you mean "they have less cache on board, less cores, different integrated gpu; they don't support higher frequency ddr and they have limits on the memory bandwidth" then no, that doesn't address the point. Intel does have different chips with all of those changed. But they also have SKUs with all of those the same but different power budgets and different frequencies. And really things like cache barely use any power at all in the overall context of the chip. SRAM, especially the 8T SRAM Intel uses, is very efficient. > you can't just 'cool away' leakage currents You certainly can, the leakage current is going to be proportional to (1-e^(-qV/KT)) so better leakage will tend to go down exponentially at lower temperatures. Yes, I know what you actually meant and you're still wrong there because if you have better cooling you can accept more leakage, meaning you can use a process with a lower threshold voltage and accept the larger amount of leakage current that results.
- LoSboccacc 8y ago
  > if you have better cooling you can accept more leakage again, no, better cooling stave off the thermal runway effect. you can think of it as generating less leakage per voltage unit, which is quite the opposite as accepting more leakage. higher operating voltage allows for accepting more leakage. and there's still no indication that cooling a specific chip design (because we're not talking about chips in general here) would prevent thermal issue within the chip, because you can only work on reducing the average surface temperature opposite to the pins - or, you can't just pick a single part of the argument and disprove it in isolation, because the whole thermal issue is not a premise, but ties in the whole claim of "we could just make this chip run with cooling at it'll beat down intels" - which they cannot, because you can't just cool away leakage currents, the chip has to be meant to be cooled and to be run with higher voltage at design phase.