5 ms·

From what we are seeing with the AV1 video decoder dav1d, where we wrote a lot of assembly by hand, the A12X can do 40 fps when a desktop can go beyond 120fps.

by jbk 8y ago

From what we are seeing with the AV1 video decoder dav1d, where we wrote a lot of assembly by hand, the A12X can do 40 fps when a desktop can go beyond 120fps. (4cores) So, it is getting closer than ever before, but we're still quite far to closing the gap.

zamadatix 8y ago
You'll find large variance in anything if you drill down to a single specific enough test case. For dav1d I imagine comparing performance between architectures is largely the same as asking if the SIMD is extremely wide on them which is largely irrelevant outside of media benchmarks.
- jbk 8y ago
  > largely irrelevant outside of media benchmarks. I disagree. SIMD can be used in numerous cases, and not only in games/video. And to the end user, it does not matter which part of the CPU/GPU is used.
  - BubRoss 8y ago
    No matter what, if you are comparing SIMD to non SIMD, that isn't any sort of a comparison between CPU architectures.
    - acdha 8y ago
      Just where do you think the SIMD instructions execute? It’s part of the CPU architecture like everything else and the quality of the implementation varies so comparisons are not only possible but critical: there’s a long history of apparent optimizations not panning out due to shared internal resources, mode switching overhead, etc.
      - BubRoss 8y ago
        If someone writes a program with AVX instructions and one without, saying the second is one third the speed is completely disingenuous. SIMD instructions aren't the difficult part of matching Intel's CPU architecture. Fast cache hierarchies, prefetching, branch prediction and out of order instructions etc. are the parts that have to be matched.
        BeeOnRope 8y ago
        Well of course SIMD performance is part of the "hard part", because it implies things like very wide cache access, including perhaps unaligned access, high bandwidth between cache levels, wide register files, etc. Plus a sane ISA extension strategy that actually gets people to use your SIMD instructions helps a lot (Intel hasn't done well here, but so far neither has ARM e.g., with almost non-existent support for SVE). SIMD performance is one place that Intel is still fairly far ahead of both AMD and the ARM competition (with Apple far out ahead in that group).
        BubRoss 8y ago
        I'm not sure what a sane ISA has to do here, the parent was comparing a SIMD accelerated program to a non-SIMD program and using that to compare two CPU architectures. Does that seem right to you?
        BeeOnRope 8y ago
        Perhaps not, but I was referring only to the assertion that wide SIMD is not in the "hard part" of designing a CPU. I happen to agree with the GP that comparing SIMD accelerated to not can give a misleading picture, and so deserves to be noted - especially when one party has relevant SIMD instructions but they weren't used for some reason.
        acdha 8y ago
        This depends entirely on what you’re measuring: if my goal is to make my work faster and a compiler can generate something which runs faster, most people don’t feel that it’s not fair to use extra CPU features - they just want to compare the results which they’ll actually get. I remember people whining in the 90s x86/Alpha/POWER comparisons that some compilers were aware of fused Multiply-Add operations, too, but everyone who was trying to make a purchasing decision just tuned them out since they wanted to know realistic FLOPS/$ ratios.
ynniv 8y ago
You're probably not using a desktop CPU with the same wattage. If Apple makes a 40 watt ARM laptop CPU, it might behave similarly to the x86.
- jbk 8y ago
  This is 100% correct. But the article does not speak only about perf/watt, but absolute perf too.
- SomeHacker44 8y ago
  I am not a hardware engineer, but my guess is that making a high performing single digit Watt processor may Take different skills than doing the same thing than a 15-28-45-90-135-160W (or more) sustained TDP CPU. My only point is that assuming Apple makes the best low power CPUs should not necessarily imply they can make good high power CPUs. They may have to build up the competency over time just as they did in the initial iterations of the A series.
  - Symmetry 8y ago
    Once you're making wide out of order application processors the skills are pretty much the same for either. But it does take quite a while to do a new architecture from scratch and you would almost need to do just that to re-design the A12 for such high power targets.
- phkahler 8y ago
  On workloads that scale well with core count (like video) that should be trivial. You go with 4x the cores and 4x the power and you're there. The software industry has been struggling for decades to make it easier to write multi-threaded code and has been making inroads only recently for software that isn't trivial to parallelize.
endorphone 8y ago
This sort of very specific benchmark is never particularly useful as single instructions on one architecture or another can yield magnitude differences. The T2 security coprocessor in the Mac -- a minimalist ARM implementation to manage a few very specific parts of the Mac -- does HEVC encoding (e.g. dramatically more complex than decoding) thirty times faster than the Intel chip it sits beside. I can't say it's a 30x faster chip, however. High TDP Intel chips definitely are much more powerful than Apple's A-series chips right now. It will be interesting to see what Apple can do with a larger power profile and active cooling, however. That's theoretical, but they should have an enormous amount of headroom to exploit.
- pjc50 8y ago
  Hang on, why is there a HEVC encoder in the security coprocessor and not the graphics unit?
  - cedivad 8y ago
    Because that's the name of the chip in the Mac that Apple developed in house. They had that IP hanging around and put it in the only place they could - the security coprocessor.
  - photojosh 8y ago
    See sibling comment that the security coprocessor is a repurposed A10. And then to answer the next question, because the HEVC encoder for iPhones has been optimised, and they can likely just use the same code that already exists for iOS. I have wondered whether they should be using the GPU in the A10/T2 too, instead of the Intel integrated graphics. Would probably perform rather well!
- phire 8y ago
  It is important to realize that the T2 coprocessor is just an A10 cpu which didn't meet the binning criteria to be included in an iPhone 7 or 2018 iPad. It happens to have hardware acclerated HEVC encoding.
  - 8y ago

by jbk 8y ago

zamadatix 8y ago

You'll find large variance in anything if you drill down to a single specific enough test case. For dav1d I imagine comparing performance between architectures is largely the same as asking if the SIMD is extremely wide on them which is largely irrelevant outside of media benchmarks.

jbk 8y ago
> largely irrelevant outside of media benchmarks. I disagree. SIMD can be used in numerous cases, and not only in games/video. And to the end user, it does not matter which part of the CPU/GPU is used.
- BubRoss 8y ago
  No matter what, if you are comparing SIMD to non SIMD, that isn't any sort of a comparison between CPU architectures.
  - acdha 8y ago
    Just where do you think the SIMD instructions execute? It’s part of the CPU architecture like everything else and the quality of the implementation varies so comparisons are not only possible but critical: there’s a long history of apparent optimizations not panning out due to shared internal resources, mode switching overhead, etc.
    - BubRoss 8y ago
      If someone writes a program with AVX instructions and one without, saying the second is one third the speed is completely disingenuous. SIMD instructions aren't the difficult part of matching Intel's CPU architecture. Fast cache hierarchies, prefetching, branch prediction and out of order instructions etc. are the parts that have to be matched.
      - BeeOnRope 8y ago
        Well of course SIMD performance is part of the "hard part", because it implies things like very wide cache access, including perhaps unaligned access, high bandwidth between cache levels, wide register files, etc. Plus a sane ISA extension strategy that actually gets people to use your SIMD instructions helps a lot (Intel hasn't done well here, but so far neither has ARM e.g., with almost non-existent support for SVE). SIMD performance is one place that Intel is still fairly far ahead of both AMD and the ARM competition (with Apple far out ahead in that group).
        BubRoss 8y ago
        I'm not sure what a sane ISA has to do here, the parent was comparing a SIMD accelerated program to a non-SIMD program and using that to compare two CPU architectures. Does that seem right to you?
        BeeOnRope 8y ago
        Perhaps not, but I was referring only to the assertion that wide SIMD is not in the "hard part" of designing a CPU. I happen to agree with the GP that comparing SIMD accelerated to not can give a misleading picture, and so deserves to be noted - especially when one party has relevant SIMD instructions but they weren't used for some reason.
      - acdha 8y ago
        This depends entirely on what you’re measuring: if my goal is to make my work faster and a compiler can generate something which runs faster, most people don’t feel that it’s not fair to use extra CPU features - they just want to compare the results which they’ll actually get. I remember people whining in the 90s x86/Alpha/POWER comparisons that some compilers were aware of fused Multiply-Add operations, too, but everyone who was trying to make a purchasing decision just tuned them out since they wanted to know realistic FLOPS/$ ratios.

ynniv 8y ago

You're probably not using a desktop CPU with the same wattage. If Apple makes a 40 watt ARM laptop CPU, it might behave similarly to the x86.

jbk 8y ago
This is 100% correct. But the article does not speak only about perf/watt, but absolute perf too.
SomeHacker44 8y ago
I am not a hardware engineer, but my guess is that making a high performing single digit Watt processor may Take different skills than doing the same thing than a 15-28-45-90-135-160W (or more) sustained TDP CPU. My only point is that assuming Apple makes the best low power CPUs should not necessarily imply they can make good high power CPUs. They may have to build up the competency over time just as they did in the initial iterations of the A series.
- Symmetry 8y ago
  Once you're making wide out of order application processors the skills are pretty much the same for either. But it does take quite a while to do a new architecture from scratch and you would almost need to do just that to re-design the A12 for such high power targets.
phkahler 8y ago
On workloads that scale well with core count (like video) that should be trivial. You go with 4x the cores and 4x the power and you're there. The software industry has been struggling for decades to make it easier to write multi-threaded code and has been making inroads only recently for software that isn't trivial to parallelize.

endorphone 8y ago

This sort of very specific benchmark is never particularly useful as single instructions on one architecture or another can yield magnitude differences. The T2 security coprocessor in the Mac -- a minimalist ARM implementation to manage a few very specific parts of the Mac -- does HEVC encoding (e.g. dramatically more complex than decoding) thirty times faster than the Intel chip it sits beside. I can't say it's a 30x faster chip, however. High TDP Intel chips definitely are much more powerful than Apple's A-series chips right now. It will be interesting to see what Apple can do with a larger power profile and active cooling, however. That's theoretical, but they should have an enormous amount of headroom to exploit.

pjc50 8y ago
Hang on, why is there a HEVC encoder in the security coprocessor and not the graphics unit?
- cedivad 8y ago
  Because that's the name of the chip in the Mac that Apple developed in house. They had that IP hanging around and put it in the only place they could - the security coprocessor.
- photojosh 8y ago
  See sibling comment that the security coprocessor is a repurposed A10. And then to answer the next question, because the HEVC encoder for iPhones has been optimised, and they can likely just use the same code that already exists for iOS. I have wondered whether they should be using the GPU in the A10/T2 too, instead of the Intel integrated graphics. Would probably perform rather well!
phire 8y ago
It is important to realize that the T2 coprocessor is just an A10 cpu which didn't meet the binning criteria to be included in an iPhone 7 or 2018 iPad. It happens to have hardware acclerated HEVC encoding.
- 8y ago