PCIe as a phy is not designed for long distances or complex topologies. A lot of motherboards, including high-end server boards, cannot even route the PCIe lane

PCIe as a phy is not designed for long distances or complex topologies. A lot of motherboards, including high-end server boards, cannot even route the PCIe lanes from CPU to PCIe socket without there being connectivity issues, which manifest as things like PCIe retransmits (which result in plummeting performance). Designing a purpose-built phy/mac, designed to handle long links and complex topologies, is the obvious thing to do.