4 ms·

What was the motivation for building it this way, instead of by more directly exposing PCIe? There must be some upside to they way it’s designed, no?

by crgwbr 8y ago

stephen_g 8y ago
I think to have the flexibility to have various topologies of many devices (daisy-chained, etc.) from a single port. Probably also timing etc. - I would think making it packet based is probably easier to make work over longer cables than raw PCI-e. The bit I really don’t get is why they keep all the specs secret. What do they think they have to gain? All that it has meant is less adoption...
- wmf 8y ago
  PCIe is also packet-based BTW [1]. The benefit from the custom protocol is being able to run PCIe and DisplayPort (and I guess networking which no one cares about) over the same cable at the same time with dynamic bandwidth allocation. USB-C has alternate modes but they're not as powerful. In theory PCIe alternate mode over USB-C should be possible and it would be much simpler than Thunderbolt but nobody has tried to build it. I imagine the spec doesn't really exist because Intel has been too lazy to properly write it (I wouldn't be surprised if Thunderbolt is basically defined as whatever the original Ridge controller implemented) and it's probably also gross. Adoption seems to be limited by cost, not by secrecy (thinking back to Firewire, it was open but there were very few controller chips for it). [1] Check out PCIe over RS-232: https://www.youtube.com/watch?v=QMiubC6LdTA https://www.youtube.com/watch?v=QMiubC6LdTA
microcolonel 8y ago
> What was the motivation for building it this way, instead of by more directly exposing PCIe? I think when intel was doing Light Peak, they didn't have IOMMU, which in my limited knowledge seems to be a solution to at least some of what is wrong with normal hot plugging PCIe (aside from somewhat complicated hardware design, I imagine). Of course IOMMU was clearly never implemented correctly, so all was for naught.
arghwhat 8y ago
PCIe as a phy is not designed for long distances or complex topologies. A lot of motherboards, including high-end server boards, cannot even route the PCIe lanes from CPU to PCIe socket without there being connectivity issues, which manifest as things like PCIe retransmits (which result in plummeting performance). Designing a purpose-built phy/mac, designed to handle long links and complex topologies, is the obvious thing to do.

What was the motivation for building it this way, instead of by more directly exposing PCIe? There must be some upside to they way it’s designed, no?

by crgwbr 8y ago

What was the motivation for building it this way, instead of by more directly exposing PCIe? There must be some upside to they way it’s designed, no?

stephen_g 8y ago

I think to have the flexibility to have various topologies of many devices (daisy-chained, etc.) from a single port. Probably also timing etc. - I would think making it packet based is probably easier to make work over longer cables than raw PCI-e. The bit I really don’t get is why they keep all the specs secret. What do they think they have to gain? All that it has meant is less adoption...

wmf 8y ago
PCIe is also packet-based BTW [1]. The benefit from the custom protocol is being able to run PCIe and DisplayPort (and I guess networking which no one cares about) over the same cable at the same time with dynamic bandwidth allocation. USB-C has alternate modes but they're not as powerful. In theory PCIe alternate mode over USB-C should be possible and it would be much simpler than Thunderbolt but nobody has tried to build it. I imagine the spec doesn't really exist because Intel has been too lazy to properly write it (I wouldn't be surprised if Thunderbolt is basically defined as whatever the original Ridge controller implemented) and it's probably also gross. Adoption seems to be limited by cost, not by secrecy (thinking back to Firewire, it was open but there were very few controller chips for it). [1] Check out PCIe over RS-232: https://www.youtube.com/watch?v=QMiubC6LdTA https://www.youtube.com/watch?v=QMiubC6LdTA

microcolonel 8y ago

> What was the motivation for building it this way, instead of by more directly exposing PCIe? I think when intel was doing Light Peak, they didn't have IOMMU, which in my limited knowledge seems to be a solution to at least some of what is wrong with normal hot plugging PCIe (aside from somewhat complicated hardware design, I imagine). Of course IOMMU was clearly never implemented correctly, so all was for naught.

arghwhat 8y ago

PCIe as a phy is not designed for long distances or complex topologies. A lot of motherboards, including high-end server boards, cannot even route the PCIe lanes from CPU to PCIe socket without there being connectivity issues, which manifest as things like PCIe retransmits (which result in plummeting performance). Designing a purpose-built phy/mac, designed to handle long links and complex topologies, is the obvious thing to do.