> Now, how do you do this using vpshufb? You can't. You keep mentioning vpshufb despite it's unable to move data across 128 bit lanes. Here's how to do that w

> Now, how do you do this using vpshufb? You can't. You keep mentioning vpshufb despite it's unable to move data across 128 bit lanes. Here's how to do that with vpermps, there's some overhead but not much, very likely much faster than RAM access even when in L1: https://stackoverflow.com/a/36951611/126995 https://stackoverflow.com/a/36951611/126995 Besides, new CPUs have AVX-512 that has vcompressps instruction just for that use case. > The L1 cache has the bandwidth to do it It has bandwidth, but there's extra latency involved. Registers are faster. It's the same on GPU, that's why nVidia recommends these CUDA permute lanes intrinsics over scatter/gather RAM access. Here's a recent article about people actually using these permute intrinsics achieving quite good results: https://news.ycombinator.com/item?id=19018240 https://news.ycombinator.com/item?id=19018240