3 ms·
Their next design and failure was i960 in BiiN project (below). Although BiiN failed, the i960 looks like a big improvement on the i432 balancing aspects of RIS
by nickpsecurity 8y ago
Their next design and failure was i960 in BiiN project (below). Although BiiN failed, the i960 looks like a big improvement on the i432 balancing aspects of RISC simplicity, object architecture, and reliability mechanisms. It looks like a nice processor. Too bad it failed in the market. It did have some interesting use cases, including the F-22 fighter.
https://en.wikipedia.org/wiki/BiiN https://en.wikipedia.org/wiki/BiiN
https://en.wikipedia.org/wiki/Intel_i960 https://en.wikipedia.org/wiki/Intel_i960
http://bitsavers.org/pdf/biin/BiiN_CPU_Architecture_Reference_Man_Jul88.pdf http://bitsavers.org/pdf/biin/BiiN_CPU_Architecture_Referenc...
- mpweiher 8y agoVery interesting references, that was the first I had heard of the BiiN project. > ...failure was i960 in BiiN project...failed in the market. I was confused by that for a bit because my vague memory was that the i960 was a roaring success. The Wikipedia page you cite seems to agree: > It became a best-selling CPU Did you mean the i960MX that was used in BiiN? > The i960MC included all of the features of the original BiiN system; but these were simply not mentioned in the specifications, leading some[who?] to wonder why the i960MC was so large and had so many pins labeled "no connect"
- nickpsecurity 8y agoYeah, the i960MX that had all the good RAS and security features. That would be useful today. Good news is we have stuff like CHERI and CoreGuard that someone might turn into systems we can actually buy for security-focused applications.
- mepian 8y agoIt would be nice if the RISC-V community adopted the lessons from CHERI while the install base is small enough to allow substantial changes to the architecture standard.