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It's surprising that it was strictly memory to memory. Register-starved architectures like the 6502 could be performant, but only in hand-coded assembly. Intel
by classichasclass 8y ago
It's surprising that it was strictly memory to memory. Register-starved architectures like the 6502 could be performant, but only in hand-coded assembly. Intel had to have known this and yet designed an architecture with no registers that was almost entirely at the compiler's mercy for throughput. Other blinkered things like having only immediates for one and zero pale by comparison.
When you can't get the basics right, it's inevitable that the OO aspects of the 432 would have failed.
- blattimwind 8y ago> Intel had to have known this and yet designed an architecture with no registers that was almost entirely at the compiler's mercy for throughput. They repeated this pattern with Itanium/VLIW, but this time the marketing was much better to the point that other vendors all but deprecated their architectures before Itanium was even released.