This also applies to AMD GCN, though. So if you compare GCN to the earlier TeraScale architecture, you could argue (like a sibling comment does) that AMD's GCN

This also applies to AMD GCN, though. So if you compare GCN to the earlier TeraScale architecture, you could argue (like a sibling comment does) that AMD's GCN is a scalar architecture and so is Nvidia's. If you look at the actual hardware, though, they're clearly both vector architectures: each "core" has N SIMD-style lanes executing the same instruction simultaneously; it's just that each of those lanes corresponds to a different work item of the compute dispatch. This applies equally to AMD's and Nvidia's architectures.