I'd assume because of the extra serial processing power of a CPU. x86 isn't the right choice though. As the chips get smaller, all the x86 cruft starts to beco

I'd assume because of the extra serial processing power of a CPU. x86 isn't the right choice though. As the chips get smaller, all the x86 cruft starts to become a larger portion of each core. RISCV with 40-ish instructions plus a SIMD extension would probably be ideal. They've already proven that those designs use less space per core than ARM.